Reproducible Co-Design of Domain-Aware Sleep Switches and Staggered Wake-Up Schedules
Conference Paper
Advanced Architecture for Digital Systems Lab · IIT Mandi
Computing hardware that is fast, frugal and hard to break.
Secure, efficient, and digital architectures - from devices to systems.
From the lab
Highlights
About the lab
The Advanced Architecture for Digital Systems Lab (A²DSL) at IIT Mandi designs computing hardware that is fast, frugal and hard to break.
Our work runs from transistors to instruction sets: post-quantum cryptographic accelerators, RISC-V processor microarchitecture, hardware security primitives, neuromorphic and in-memory computing, and the physical design flows that turn all of it into silicon. We build real systems - RTL, FPGA prototypes and tapeouts - and we publish and open-source what we learn.
Latest work
Recent publications
Self-Interference in Credit-based AXI Regulation: A Misattributed Write-Latency Penalty and Its Decoupled Elimination
Conference Paper
XSC: A Correlation-Aware Stochastic Computing Extension for RISC-V Edge Processors.
Conference Paper
QIEDP-X: Reliability-Guided Collision Resolution for Short-Block IoT Serial Links
Conference Paper
Towards Efficient Post-Quantum Cryptography: Implementations of Optimized K2RED, Plantard, and Approximate Modular Multipliers
Conference Paper
From the lab
News
𝐑𝐞𝐬𝐞𝐚𝐫𝐜𝐡 𝐏𝐚𝐩𝐞𝐫 𝐀𝐜𝐜𝐞𝐩𝐭𝐞𝐝 𝐟𝐨𝐫 𝐎𝐫𝐚𝐥 𝐏𝐫𝐞𝐬𝐞𝐧𝐭𝐚𝐭𝐢𝐨𝐧 𝐚𝐭 𝐭𝐡𝐞 𝐏𝐫𝐞𝐬𝐭𝐢𝐠𝐢𝐨𝐮𝐬 𝐕𝐋𝐒𝐈𝐃 𝟐𝟎𝟐𝟕!
Thrilled to share that our research on domain-aware sleep switches has been officially accepted for an oral presentation at the upcoming International Conference on VLSI Design VLSID 2027🎉…